This PCL-XL file is claimed by the customer to be 3 times slower than another vendor's PCL, both on a PC and on a target embedded RIP. They are running page buffer mode, presumably at 600 dpi (I have asked to make sure) to a mono 1-bit device. This file does not exhibit the misbehavior due to the plalloc free list maintenance (DEBUG build time is 5.1 sec, vs. release build of 2.7 sec). I will also attach the profile from rev 9388 (PL_KEEP_GLOBAL_FREE_LIST false).
Created attachment 4751 [details] A3_color_test_Czech.prn.bz2 PCL-XL file
Created attachment 4752 [details] A3.profile.txt profile
Created attachment 4753 [details] coverage_data.txt refine profiling data with line execution counts for mem_mono_strip_tile_rectangle()
I am concerned we are looking at something different because the customer is halftoning as a post process. We really should get an exact command line or the customer can look at our profiling and coverage data to confirm we are studying the same bottleneck.
Closing, not enough information to make progress here.
Changing customer bugs that have been resolved more than a year ago to closed.